2022-03-30 09:31:56 +00:00
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{ stdenv
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, fetchFromGitHub
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, lib
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, bison
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, cairo
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, flex
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, libX11
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, libXpm
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, pkg-config
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, tcl
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, tk
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}:
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stdenv.mkDerivation rec {
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pname = "xschem";
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version = "3.0.0";
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src = fetchFromGitHub {
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owner = "StefanSchippers";
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repo = "xschem";
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rev = version;
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sha256 = "sha256-C57jo8tAbiqQAgf4Xp2lpFGOr6F1knPpFcYxPiqSM4k=";
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};
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nativeBuildInputs = [ bison flex pkg-config ];
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buildInputs = [ cairo libX11 libXpm tcl tk ];
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hardeningDisable = [ "format" ];
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meta = with lib; {
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2022-06-16 17:23:12 +00:00
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broken = stdenv.isDarwin;
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2022-03-30 09:31:56 +00:00
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description = "Schematic capture and netlisting EDA tool";
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longDescription = ''
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Xschem is a schematic capture program, it allows creation of
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hierarchical representation of circuits with a top down approach.
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By focusing on interfaces, hierarchy and instance properties a
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complex system can be described in terms of simpler building
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blocks. A VHDL or Verilog or Spice netlist can be generated from
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the drawn schematic, allowing the simulation of the circuit.
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'';
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homepage = "https://xschem.sourceforge.io/stefan/";
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license = licenses.gpl2Plus;
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maintainers = with maintainers; [ fbeffa ];
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platforms = platforms.all;
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};
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}
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