7e47f3658e
GitOrigin-RevId: 1925c603f17fc89f4c8f6bf6f631a802ad85d784
91 lines
3 KiB
Nix
91 lines
3 KiB
Nix
{ lib
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, stdenv
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, fetchFromGitHub
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, cmake
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, pkg-config
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, ragel
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, util-linux
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, python3
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, boost184
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, sqlite
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, pcre
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, enableShared ? !stdenv.hostPlatform.isStatic
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}:
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stdenv.mkDerivation rec {
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pname = "vectorscan";
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version = "5.4.11";
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src = fetchFromGitHub {
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owner = "VectorCamp";
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repo = "vectorscan";
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rev = "vectorscan/${version}";
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hash = "sha256-wz2oIhau/vjnri3LOyPZSCFAWg694FTLVt7+SZYEsL4=";
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};
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nativeBuildInputs = [
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cmake
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pkg-config
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ragel
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python3
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] ++ lib.optional stdenv.hostPlatform.isLinux util-linux;
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buildInputs = [
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boost184
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sqlite
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pcre
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];
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# FAT_RUNTIME bundles optimized implementations for different CPU extensions and uses CPUID to
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# transparently select the fastest for the current hardware.
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# This feature is only available on linux for x86, x86_64, and aarch64.
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#
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# If FAT_RUNTIME is not available, we fall back to building for a single extension based
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# on stdenv.hostPlatform.
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#
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# For generic builds (e.g. x86_64) this can mean using an implementation not optimized for the
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# potentially available more modern hardware extensions (e.g. x86_64 with AVX512).
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cmakeFlags = [ (if enableShared then "-DBUILD_SHARED_LIBS=ON" else "BUILD_STATIC_LIBS=ON") ]
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++
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(if lib.elem stdenv.hostPlatform.system [ "x86_64-linux" "i686-linux" ] then
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[ "-DBUILD_AVX2=ON" "-DBUILD_AVX512=ON" "-DBUILD_AVX512VBMI=ON" "-DFAT_RUNTIME=ON" ]
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else
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(if (stdenv.hostPlatform.isLinux && stdenv.hostPlatform.isAarch64) then
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[ "-DBUILD_SVE=ON" "-DBUILD_SVE2=ON" "-DBUILD_SVE2_BITPERM=ON" "-DFAT_RUNTIME=ON" ]
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else
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[ "-DFAT_RUNTIME=OFF" ]
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++ lib.optional stdenv.hostPlatform.avx2Support "-DBUILD_AVX2=ON"
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++ lib.optional stdenv.hostPlatform.avx512Support "-DBUILD_AVX512=ON"
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)
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);
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doCheck = true;
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checkPhase = ''
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runHook preCheck
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./bin/unit-hyperscan
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runHook postCheck
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'';
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meta = with lib; {
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description = "Portable fork of the high-performance regular expression matching library";
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longDescription = ''
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A fork of Intel's Hyperscan, modified to run on more platforms. Currently
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ARM NEON/ASIMD is 100% functional, and Power VSX are in development.
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ARM SVE2 will be implemented when hardware becomes accessible to the
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developers. More platforms will follow in the future, on demand/request.
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Vectorscan will follow Intel's API and internal algorithms where possible,
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but will not hesitate to make code changes where it is thought of giving
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better performance or better portability. In addition, the code will be
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gradually simplified and made more uniform and all architecture specific
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code will be abstracted away.
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'';
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homepage = "https://www.vectorcamp.gr/vectorscan/";
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changelog = "https://github.com/VectorCamp/vectorscan/blob/${src.rev}/CHANGELOG-vectorscan.md";
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platforms = platforms.unix;
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license = with licenses; [ bsd3 /* and */ bsd2 /* and */ licenses.boost ];
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maintainers = with maintainers; [ tnias vlaci ];
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};
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}
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