8ac5e011d6
GitOrigin-RevId: 2c3273caa153ee8eb5786bc8141b85b859e7efd7
37 lines
1.1 KiB
Nix
37 lines
1.1 KiB
Nix
{ stdenv, fetchFromGitHub, openssl }:
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stdenv.mkDerivation {
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pname = "xilinx-bootgen";
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version = "unstable-2019-10-23";
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src = fetchFromGitHub {
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owner = "xilinx";
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repo = "bootgen";
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rev = "f9f477adf243fa40bc8c7316a7aac37a0efd426d";
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sha256 = "1qciz3jkzy0z0lcgqnhch9pqj0202mk5ghzp2m9as5pzk8n8hrbz";
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};
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buildInputs = [ openssl ];
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enableParallelBuilding = true;
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installPhase = ''
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install -Dm755 bootgen $out/bin/bootgen
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'';
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meta = with stdenv.lib; {
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description = "Generate Boot Images for Xilinx Zynq and ZU+ SoCs";
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longDescription = ''
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Bootgen for Xilinx Zynq and ZU+ SoCs, without code related to generating
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obfuscated key and without code to support FPGA encryption and
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authentication. These features are only available as part of Bootgen
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shipped with Vivado tools.
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For more details about Bootgen, please refer to Xilinx UG1283.
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'';
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homepage = "https://github.com/Xilinx/bootgen";
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license = licenses.asl20;
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platforms = platforms.linux;
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maintainers = [ maintainers.flokli ];
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};
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}
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